Embedded Coder Support Package for Texas Instruments AM26X Processors

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Examples

Table of Contents
Examples Control ADC BURST MODE EPWM Description: Example path: Model: Output: ADC BURST MODE OVERSAMPLING Description: Example path: Output ADC DIFFERENTIAL MODE Description: Example path: Model: Output: ADC MULTIPLE SOC EPWM Description: Example path: Model: Output: ADC SOC EPWM Description: Example path: Model: Output: ADC PPB DELAY Description: Example path: Model: Output: ADC PPB OFFSET Description: Example path: Model: Output: ADC SOC CONTINUOUS Description: Example path: Model: Output: ADC SOC Software Description: Example path: Model: Output: ADC SOC OVERSAMPLING Description: Example path: Model: Output: ADC SOC SOFTWARE SYNC Description: Example path: Model: Output: CMPSS Asynchronous Trip Description: Example path: Model: Output: CMPSS External Mode Description: Example path: Model: Output ECAP Capture PWM Description: Example path: Model: Output: ECAP APWM Mode Description: Example path: Model: Output: EPWM Chopper: Description: Example path: Model: Output: EPWM deadband Description: Example path: Model: Output: EPWM Synchronization Description: Example path: Model: Output: EPWM TRIP ZONE Description: Example path: Model: Output: EPWM HR DEADBAND SFO Description: Example path: Model: EPWM HR DUTY CYCLE SFO Description: Example path: Model: EPWM HR PHASE SHIFT SFO Description: Example path: Model: EPWM XCMP Multiple Edges Description: Example path: Model: Output: GPIO INPUT INTERRUPT Description: Example path: Model: Output: GPIO LED BLINK Description: Example path: Model: UART echo Description: Example path: Model: Output: EQEP Direction Position Description: Example path: Model: Output: SDFM EPWM SYNC Description: Example path: Model: Output: SDFM Filter Sync CPU Read Description: Example path: Model: Output: SDFM Filter Sync CPU Read Single Channel Description: Example Path: Model: Output: MCAN External Read Write Description: Example Path: Model: Output: MCAN Internal Lopback Description: Example path: Model: Output: MSPI Loopback polling Description: Example path: Model: Output: MCSPI External Read Write: Description: Example path: Model: Output: DAC Ramp Wave Description: Example path: Model: Output: DAC Square Wave Description: Example path: Model: Output: DAC Constant Voltage Description: Example path: Model: Output: External Mode Description: Example path: Model: Output: PIL Description: Example Path: Model: Output: Set Up CAN Communication with Target Hardware XCP over CAN Example path: Model: Output: Profiling in External Model PIL Profiling CCS Project Generation Output Multicore Multicore Core0 Model Multicore Configuration: Multicore Core1 Model

Control

ADC BURST MODE EPWM

Description:

The ADC Burst Mode EPWM example sets up ePWM0 to periodically trigger a burst mode conversion of burst size 3 on ADC1 for conversion of inputs on Channel 0, Channel 1, Channel 2 and Channel 3. The interrupt ISR is used to read the results of inputs on the various channels

Example path:

examples\block_examples\adc\adc_burst_mode_epwm

Model:

adc_burst_mode_epwm_final_model.png

Output:

adc_burst_mode_epwm_out.png

ADC BURST MODE OVERSAMPLING

Description:

This example sets up ePWM0 to periodically trigger conversions on ADC1 for inputs on channel 0, channel 1 and channel 3. The burst mode conversions are configured for SOC's that will be converting the analog values from channel 3. The ISR is configured to read the conversions results from all three channels

Example path:

examples\block_examples\adc\adc_burst_mode_oversampling
adc_burst_mode_oversampling_final_model.png

Output

adc_burst_mode_oversampling_output.png

ADC DIFFERENTIAL MODE

Description:

This example sets up ePWM0 to periodically trigger SOC0 and SOC1 on ADC1 for conversion of inputs on ADC_AIN0 and ADC_AIN1 in differential modes(ADC_AIN0-ADC_AIN1) on SOC0 and (ADC-AIN1-ADC_AIN0) on SOC1

Example path:

examples\block_examples\adc\adc_differential_mode

Model:

adc_differential_mode_final_model.png

Output:

adc_differential_mode_output.png

ADC MULTIPLE SOC EPWM

Description:

This example sets up ePWM0 to periodically trigger conversions SOC0, SOC1, SOC2 on both ADC1 and ADC2. This example demonstrates multiple ADCs working together to process a batch of conversions

Example path:

examples\block_examples\adc\adc_multiple_soc_epwm

Model:

adc_multiple_soc_epwm_final_model.png

Output:

adc_multiple_soc_epwm_output.png

ADC SOC EPWM

Description:

The ADC SOC EPWM example demonstarated periodic triggering of conversion on ADC1 by EPWM0. For ADC1, SOC 0 is what gets triggered by EPWM0. The SOC0 sample on channel 0 of ADC1. Additionally, ADCINT1 is configured to generate an interrupt with SOC0 being the source of this interrupt. The ISR that gets called on receiving the interrupt reads SOC0 results, after which it clear ADC1INT1 flag

Example path:

examples\block_examples\adc\adc_soc_epwm

Model:

adc_soc_epwm_final_model.png

Output:

adc_soc_epwm_output2.png

ADC PPB DELAY

Description:

This example demonstrates the PPB delay time stamp feature of ADC, The PPBs in ADC offer timestamping the delay between SOC conversion and trigger for SOC

Example path:

examples\block_examples\adc\adc_ppb_delay

Model:

adc_ppb_delay_final_model.png

Output:

adc_ppb_delay_output.png

ADC PPB OFFSET

Description:

This example demonstrates the PPB offset feature of the Post Processing Block of ADC. The PPB offset feature is as follows:
1) PPB Calibration Offset: This is used for setting calibration offset of SOC result, ADC SOC result = ADC result - PPB Calibration value
2) PPB Reference Offset: This is used to calculate an offset from a given reference, PPB result corresponding to given SOC = ADC result - PPB reference

Example path:

examples\block_examples\adc\adc_ppb_offset

Model:

adc_ppb_offset_model3.png

Output:

adc_ppb_offset_output.png

ADC SOC CONTINUOUS

Description:

This example converts ADC1 Channel 0 on all its SOC configurations, acheiving full sampling rate on input signal on given channel

Example path:

examples\block_examples\adc\adc_soc_continuous

Model:

adc_soc_continnuous_model2.png

Output:

adc_soc_continuous_out1.png

ADC SOC Software

Description:

This example uses the ADC to perform an ADC SOC conversion triggered by software. The configured ADC module is ADC0, and SOC0 is to be triggered by software. Additionally, ADCINT1 is enabled and is configured to be generated at end of conversion of SOC0. This examples demonstartes forcing SOC0 through software and then capturing ADC results

Example path:

examples\block_examples\adc\adc_soc_software

Model:

adc_soc_software_model3.png

Output:

adc_soc_softwaree_output.png

ADC SOC OVERSAMPLING

Description:

This example shows oversamping on a given ADC channel, periodically triggered by EPWM. ADC1 Channel 2 is sampled by SOC (2-5) and are triggered by EPWMSOCA along with SOC 0 (sampling channel 0) and SOC 1 (sampling Channel 1).

Example path:

examples\block_examples\adc\adc_soc_oversampling

Model:

adc_soc_oversampling_final_model.png

Output:

adc_soc_oversampling.png

ADC SOC SOFTWARE SYNC

Description:

This example shows synchronous operation on ADC1 and ADC2 trigger by a software forced by toggling a GPIO. The example uses a GPIO loopb into the INPUTBAR[5] as trigger for the SOC in the given ADC and uses software to toggle to the loopback GPIO trigger the conversions.

Example path:

examples\block_examples\adc\adc_soc_software_sync

Model:

adc_soc_software_sync_final_model.png

Output:

adc_soc_software+sync_output.png

CMPSS Asynchronous Trip

Description:

This example enables the CMPSS High comparator and feeds the asynchronous output to GPIO and EPWM. The asynchronous CTRIPOUTH signal is fed to the XBAROUT0 pin and CTRIPH to EPWM0B. CMPSS is configured to generate trip signals to trip the EPWM signals. CMPIN1P is used to give positive input and internal DAC is configured to provide the negative input.

Example path:

examples\block_examples\cmpss\cmpss_asynchronous_trip

Model:

Output:

CMPSS External Mode

Description:

This example configures a high comparator, with the negative input source being Internal DAC and the positive input source being a ramp wave fed to
DAC. The comparator status value is being monitored through the scope. The STS value is 0 as long as the voltage on the positive pin is lesser than the voltage on the negative pin. Once the value in the positive pin exceeds 1.65V(2048) the STS value becomes 1. This example is used with external mode that allows monitoring of the output values.

Example path:

examples\block_examples\cmpss\cmpss_external_mode

Model:

Output

ECAP Capture PWM

Description:

This example configures ECAP, to capture the timestamp between the rising and falling edges of EPWM output. Two EPWM modules are configured with a 300 phase shift.
ECAP0 capturess EPWM0 output, and ECAP1 captures EPWM1 output.

Example path:

examples\block_examples\ecap\ecap_capture

Model:

Output:

ECAP APWM Mode

Description:

This example configures the ECAP in APWM mode to generate a PWM signal. The compare and period values are specified in such a manner as to output a 50% duty cycle EPWM waveform.

Example path:

examples\block_examples\ecap\ecap_apwm

Model:

Output:

EPWM Chopper:

Description:

This example allows a carrier signal to modulate PWM waveform generated by action-qualifier and dead-band submodule, by configuring Chopping(carrier) frequency, programmable puse width of first pulse and duty cycle

Example path:

examples\block_examples\epwm\epwm_chopper

Model:

epwm_chopper_model2.png

Output:

epwm_chopper_output.png

EPWM deadband

Description:

The EPWM Deadband example is used to showcase the features of deadband submodule. 6 EPWM modules are configured with varying deadband features and EPWM0 is taken as the reference whose Deadband is disabled

Example path:

examples\block_examples\epwm\epwm_deadband

Model:

epwm_deadband_model2.png

Output:

epwm_deadband_output.png

EPWM Synchronization

Description:

The EPWM Synchronization example is used to showcase the synchronization feature of EPWM. 5 EPWM modules are configured with EPWM 0 taken as reference and other EPWM modules are phase shifted with respect to the first EPWM module. The sync in source for EPWM 1-EPWM 4 is EPWM 0 sync-out signal. On receiving this sync-in source, these EPWM module counter value will start counting from the phase shift value up until the configured period value.

Example path:

examples\block_examples\epwm\epwm_deadband

Model:

epwm_synchronization_model2.png

Output:

epwm_synchronization_Output.png

EPWM TRIP ZONE

Description:

This example configures EPWM9 and EPWM1 using trip zone sudmodule. EPWM9 has TZ1 as one shot trip source and EPWM1 has TZ1 as cycle-by-cycle trip source. On receiving the trip trigger, EPWM9 output configured for one-shot trip will change to trip state forever. EPWM1 output configured for cycle-by-cycle will trip on receiving the epwm trigger and will recover when the event configured for clearing CBC latch occurs.

Example path:

examples\block_examples\epwm\epwm_trip_zone

Model:

epwm_trip_zone_model2.png

Output:

epwm_trip_zone_output.png

EPWM HR DEADBAND SFO

Description:

This example modifies MEP control registers to show edge displacement for high-resolution deadband with ePWM in up-count mode due to HRPWM control extension of respective module

Example path:

examples\block_examples\epwm\hrpwm_deadband_sfo

Model:

hrpwm_deadband_sfo_model.png

EPWM HR DUTY CYCLE SFO

Description:

This example modifies MEP control registers to show edge displacement for high-resolution duty cycle with ePWM in up-count mode due to HRPWM control extension of respective module

Example path:

examples\block_examples\epwm\hrpwm_duty_cycle_sfo

Model:

hrpwm_duty_cycle_sfo_model.png

EPWM HR PHASE SHIFT SFO

Description:

This example modifies MEP control registers to show edge displacement for high-resolution phase shift with ePWM in up-count mode due to HRPWM control extension of respective module

Example path:

examples\block_examples\epwm\hrpwm_phase_shift_sfo

Model:

hrpwm_phase_shift_sfo_model.png

EPWM XCMP Multiple Edges

Description:

This example uses the ePWM module to generate multiple edges in a pwm cycle. Three insatnces of PWM are used:
1) EPWM0 XCMP feature is disabled and it generates waves with 50% duty cycle
2) EPWM1 XCMP feature is enabled, and the ACTIVE as well as the three SHADOW set registers are used:
3) EPWM2 XCMP feature is enabled, and only the ACTIVE set regisetrs are used

Example path:

examples\block_examples\epwm\epwm_xcmp_multiple_edges

Model:

Output:

GPIO INPUT INTERRUPT

Description:

This example configures a GPIO pin in input mode and configures it to generate interrupt on rising edge. The application reads the input pin state and displays it in the UART console everytime the interrupt gets triggered(SW4 is pressed)

Example path:

examples\block_examples\gpio\gpio_input_interrupt

Model:

gpio_input_interrupt_final_model.png

Output:

gpio_input_interrupt_output.png

GPIO LED BLINK

Description:

This example configures a GPIO pin connected to an LED on the EVM in output mode.The example toggles the GPIO LED on/off

Example path:

examples\block_examples\gpio\gpio_led_blink

Model:

gpio_led_blink_model.png

UART echo

Description:

This example features the working of the UART READ and UART WRITE operation. Here the UART Read block is configured to read 8 characters and echos back the same into the UART port using the UART WRITE block.

Example path:

examples\block_examples\uart\uart_echo

Model:

uart_echo_model2.png

Output:

UART_Echo_Output.png

EQEP Direction Position

Description:

This example provides Direction and position measurements using the capture unit and speed measurement using unit timeout of the EQEP module. EPWM is used to generate the quadrature input of the EQEP. GPIO can optionally be added to give the index signal to the EQEP.

Example path:

examples\block_examples\eqep\eqep_direction_speed

Model:

Output:

SDFM EPWM SYNC

Description:

This SDFM example reads filter data from CPU within ISR. EPWM1 SOCA is used to synchronize all four SDFM filters. All 4 filters use SD1 clock. EPWM0_B is used to generate SDFM clock.

Example path:

examples\block_examples\sdfm\sdfm_epwm_sync

Model:

Output:

SDFM Filter Sync CPU Read

Description:

This is an SDFM example that reads filter data from CPU, SDFM filter data is read from ISR. All 4 filters use their respective channel clock.

Example path:

examples\block_examples\sdfm\sdfm_filter_sync_cpu_read

Model:

Output:

SDFM Filter Sync CPU Read Single Channel

Description:

In this example the filter data of a signle SDFM channel is read from CPU. Only SDFM0 Filter Channel 1 is configured.

Example Path:

examples\block_examples\sdfm\sdfm_filter_sync_cpuread_single_channel

Model:

Output:

MCAN External Read Write

Description:

This example demonstrates (tested on) the CAN message communication to external PC via PCAN-USB. Instance MCAN0 is set as a Commander in Transmit Mode. Message is transmitted and received back from external PC via PCAN-USB. Messages configured in the model are trasmitted continuously, users can manually send messages from external PC. Upon receiving a message an interrupt gets generated for new data, and the received message is printed out on the UART console.

Example Path:

examples\block_examples\mcan\mcan_external_read_write

Model:

Output:

MCAN Internal Lopback

Description:

This example demonstrates the CAN message transmission and reception in digital loop back mode. Message is transmitted and received back internally using internal loopback mode.

Example path:

examples\block_examples\mcan\mcan_internal_loopback

Model:

Output:

MSPI Loopback polling

Description:

This example demonstrates the McSPI RX and TX operation configured in polling of operation. This example sends a known data in the TX mode and then receives the same in RX mode. When transfer is completed, TX and RX buffer data are compared. If data is matched, test result is passed otherwise failed.

Example path:

examles\block_examples\mcspi\mcspi_loopback_polling

Model:

Output:

MCSPI External Read Write:

Description:

This example demonstrates the McSPI RX and TX operation configured in polling of operation. This example sends a known data in the TX mode and then receives the same in RX mode. When transfer is completed, TX and RX buffer data are compared. If data is matched, test result is passed otherwise failed.

Example path:

examples\block_examples\mcspi\mcspi_external_read_write

Model:

Output:

DAC Ramp Wave

Description:

This example uses DAC to generate a ramp wave on the DAC output. The example makes use of external mode which allows for live monitoring of the DAC signal

Example path:

examples\block_examples\dac\dac_ramp_wave

Model:

Output:

DAC Square Wave

Description:

This examples uses the DAC to generate a square wave on the DAC output. The example makes use of external mode which allows for live monitoring of the DAC signal.

Example path:

examples\block_examples\dac_square

Model:

Output:

DAC Constant Voltage

Description:

This examples uses the DAC to generate a constant voltage on the DAC output. The example makes use of external mode which allows for live monitoring of the DAC signal.

Example path:

examples\block_examples\dac_constant_voltage

Model:

Output:

External Mode

Description:

This example performs code verification and validation with external mode. External mode allows for monitoring and parameter tuning which allows the user to change the block parameter values while the model application is running on the target. When the parameter values are altered from Simulink, the modified parameter values are communicated to the target hardware immediately. The parameter tuning effect can be observed by viewing the algorithm signals via a scope.
Running the model in External Mode
The examples is configured to use 'XCP over Serial' as the communication interface for external mode.
1) UART can be accessed via the USB cable connected to the hardware through a virtual COM port. Please make a note of the COM port number of the USB Serial Port showing in your Windows Device Manager under Ports. This value is then passed as the Serial port parameter under external mode.
2) Under the external mode tab, please enter the serial port corresponding to your hardware.

3) XCP on serial make use of UART0 instance for communication from the hardware side. So please ensure that the pinmux for UART0 is enabled.
4) Click Apply and close the configuration parameters window.
5) Go to Hardware tab and click Monitor & Tune.
Wait for the model to build and load on the target, post which external mode simulation starts. The output of the gain block can be viewed through the Scope block. The parameters of the Pulse Wave Generator, Sine Wave Generator and Gain block can be modified while the application ii running on the target.
6) Stop External Mode Simulation.

Example path:

examples\external_mode\external_mode.slx

Model:

Output:

PIL

Description:

This is a Code Verification and Validation example that uses Processor in Loop. The generated code runs on the hardware, and the results of PIL simulations are transferred to Simulink to verify equivalence of the simulation and code generation result.
Runnig the example with PIL.
1) UART can be accessed via the USB cable connected to the hardware through a virtual COM port. Please make a note of the COM port number of the USB Serial Port showing in your Windows Device Manager under Ports. This value is then passed as the Serial port parameter under PIL.
2) PIL makes use of UART0 instamce for communication from the hardware side. So please ensure that the pinmux for UART0 is enabled.
3) To run the PIL example, under the Apps tab select SIL/PIL Manager that is used for Code Verification, Validation and Testing. This will display a SIL/PIL manager tab, in this please configure the parameters required for PIL: System under Test, Top Model Mode and Stop Time.
4) Please click on 'Run Verification' to start PIL simulation.
5) When the model stops running, the simulation inspector will show the output results.
This example contains two model blocks that point at the same referenced model. One of the block is configured to run in PIL simulation mode and the other in normal mode. The simulation inspector will show the output of the PIL simulation as well as normal mode simulation output, and drwa comparison results.

Example Path:

examples\PIL\PIL.slx

Model:

Output:

Set Up CAN Communication with Target Hardware

1) Download and install the "XL Driver Library Setup" from following link: Download | Vector
2) Download and install the Vector driver setup for Windows 10 and 11 from this link: https://cdn.vector.com/drivers/Vector_Driver_Setup.zip
3) Open File Explorer and find the "vxlapi.dll" and "vxlapi64.dll" files in the XL Driver Library installation folder (e.g., "C:\Users\Public\Documents\Vector\XL Driver Library 20.30.14\bin").
4) Copy the "vxlapi64.dll" file to the "C:\Windows\System32" folder.
5) Copy the "vxlapi.dll" file to the "C:\Windows\SysWOW64" folder.
6) Restart your computer.
7) Open MATLAB and run the "canChannelList" command in the command window.
8) Run vcanconf.exe in the vector driver installation.
9) Right click on application and select "Add application"
10) Name the application as 'MATLAB' and keep default settings.
11) Right-click first CAN piggy hardware select MATLAB and pick CAN1.
12) Right-click first CAN piggy hardware and click Default baud rate to chnage baud. to 500000 Kbps.
CAN communication is now setup between hos computer and C2000 target hardware.

XCP over CAN

This example performs code verification and validation with external mode. External mode allows for monitoring and parameter tuning which allows the user to change the block parameter values while the model application is running on the target. When the parameter values are altered from Simulink, the modified parameter values are communicated to the target hardware immediately. The parameter tuning effect can be observed by viewing the algorithm signals via a scope.
Running the model in External Mode
The examples is configured to use 'XCP over CAN' as the communication interface for external mode.
1) Please enable External Mode in command. To acheive this run the following commands in the comman window
dummyConnection = coder.internal.connectivity.XcpTargetConnection('XcpOnCAN');
delete(dummyConnection);
slfeature('XcpOnCANSupport', 1);
2) The CAN interface being used to test XCP over CAN in this example is Vector VN1630A, this device is connected to the PC through the USB port.
3) In the model configuration parameters under pinmux enable MCAN0_RX and MCAN0_TX.
4) Under the MCAN pane, enable MCAN. Under the external mode pane, select communication interface as CAN and enter details of the CAN device being used. We have tested this examples using Vector VN1630A device.
5) Click Apply and close the configuration parameters window.
6) Go to Hardware tab and click Monitor & Tune.
Wait for the model to build and load on the target, post which external mode simulation starts. The output of the gain block can be viewed through the Scope block. The parameters of the Pulse Wave Generator, Sine Wave Generator and Gain block can be modified while the application ii running on the target.
7) Stop External Mode Simulation.

Example path:

examples\external_mode\external_mode_can_am263x.slx

Model:

Output:

Profiling in External Model

1) In the Model settings, enable External Model.
2) Navigate to Code generation > Verification and select Measure task execution time. Select the required option for Measure function execution time.
3) Click Monitor & Tune from Hardware tab of Simulink toolstrip to generate profiling report.
4) After the simulation ends, a profiling report is generated with profiling metric of different tasks/functions that are being profiled.

PIL Profiling

Perform PIL profiling by measuring the algorithm execution time in the target hardware and generate code in PIL mode.
1) In the model settings menu, under Code Generation > Verification, enable Measure execution time and select the required option for function execution time. Under Adavnced parameters select PIL for Create block.
2) Select the PIL parameter settings.
3) Right click on any subsystem to be profiled. Under the C/C++ Code menu, select Deploy this Subsystem to Hardware.
4) This generates a PIL subsystem, use this subsystem in the main block.
5) On the SIL/PIL toolstrip, select SIL/PIL Simulation Only.
6) Select Model blocks in SIL/PIL mode in the System Under Test.
7) Click Run SIL/PIL on the SIL/PIL toolstrip.

CCS Project Generation

Creating Code Composer Studio Project is possible from a model, to create a CCS project follow the steps below:
1) Run the file setPathForCCS{device}.m under the folder ccs_path for creating a CCS Project for a target device. This will set environment variables for the paths that are used during CCS build.
2) Open the model ADC_CCS in the path examples/ccs_project/ADC_CCS.slx, this model is configured for the AM263X LP device.
3) Build the model, this will generate two folder under the generated code folder: CCS_Project, CCS_Workspace.
4) Open CCS and choose the workspace as the workspace present in the generated model code folder "examples\ccs_project\ADC_CCS_ert_rtw\CCS_Workspace"
5) Import the generated CCS Project into the CCS Project Explorer space.
6) Build the project over CCS ths will generate the binary in the CCS_Workspace
7) Connect to the device and load the generated binary in the path "\examples\ccs_project\ADC_CCS_ert_rtw\CCS_Workspace\ADC_CCS\debug"

Output

Multicore

Multicore communication is enabled by making use of the Interprocess Data Write and Interprocess Data Read blocks. Using these blocks users can transmit data from one core to another. In this example we are reading ADC values from R5FSS0_0 and sending it to R5FSS0_1 which is prinitng these ADC values over UART.

Multicore Core0 Model

example_path: examples\block_examples\ipc\am263x_multicore_core0

Multicore Configuration:

1) Configure the model for a particular core. Here we have configured the model for Core0(R5FSS0_0)
2) Configure the IPC settings for the model:
IPC Self Core
Number of remote cores enabled
Remote cores enabled for IPC
Number of buffers used for IPC
Buffer size in bytes used for IPC
3) Configure IPC TX Block

Multicore Core1 Model

example_path: examples\block_examples\ipc\am263x_multicore_core1
Multicore Configuration:
1) Configure the model for a particular core. Here we have configured the model for Core0(R5FSS0_1)
2) Configure the IPC settings for the model:
IPC Self Core
Number of remote cores enabled
Remote cores enabled for IPC
Number of buffers used for IPC
Buffer size in bytes used for IPC
3) Configure IPC RX Block
Output: